Thermo-mechanical stress analysis of VLSI devices by partially coupled finite element method

Abstract

The impact of thermo-mechanical stress and distortion behavior is crucial during development of VLSI (very large scale integration) and WSI (wafer scale integration) circuits for their safe operation. The problem of the junction overheating and the thermal design aspect remains a major obstacle to the most required performances of electronic systems: increased speed of operation and component miniaturization. The design of a reliable large and powerful processor requires thermal analysis for the whole device of coupled fluid-heat transfer from junction to ambient. Device electro-thermal behavior is principally influenced by package geometry, junction structure, and physical heat sources distribution. The paper analyzes thermo-mechanical stress using a mixed fluid-heat transfer approach for thermal analysis and distortion behavior in large VLSI and WSI microelectronic devices by the partially coupled FEM (finite element method). The estimation of equivalent convection coefficient has become the major issue for device junction to ambient thermal analysis. Based on FEM, the approach combines fluid flow and heat transfer mechanisms to predict, in general, the working temperature of the IC (integrated circuit). A numerical example is given to demonstrate the critical behavior of a BGA (ball grid array) package. It concerns the steady state thermal stress and distortion modeling of semiconductor devices undergoing large power heating. The methodology presented can be used for accurate rating of semiconductor devices or heat sink systems during large ASIC (application specific integrated circuit) circuit design.