Abstract

Accelerated life tests on microelectronic devices are needed to estimate their degradation under severe environment. THB (Temperature Humidity Bias) [1] at 85°C and 85%RH (relative humidity) is commonly used for reliability studies. Empirical acceleration laws, used for THB test take into account the temperature change (from 22°C to 85°C), but they do not quantify its impact of the corresponding thermo-elastic stress which it adds to the residual stress in the die and of possible microstructure changes. The aim of this work is to determine the thermo-mechanical stresses induced in the active layer of a Gallium Arsenide (GaAs) chip by the THB test. They are due to the mismatch in Coefficients of Thermal Expansion (CTE) between the stack of thin film materials used as metallurgic interconnection and the intermediate dielectric layers above the active area of the chip. To estimate this stress, fist layers thicknesses measurement have been made with various techniques; second few configurations have been used to simulate heating and finally “complete” 2D Finite Element Analysis (FEA) has been performed. Elastic and thermo-physical materials data come from the literature. The results indicate compression of metal gate (Ti/Al/Au) and tensile stress concentration in the SiN x passivation layer. The outcomes is compared with THB test results from [2] and suggests that stress induced by heating must be considered to explain failure during THB test.

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