Thermoelectric properties of holey silicon at elevated temperatures

Abstract

Compatibility to the semiconductor industry makes silicon thin-film devices attractive for thermoelectric applications. Silicon has a competitive thermoelectric power factor but a large thermal conductivity, which results in an overall small thermoelectric figure of merit, ZT. By patterning arrays of nano-sized holes with spacing less than the average phonon mean free path into the Si thin films, their thermal conductivity can be greatly suppressed, whereas their electronic properties are less affected. We fabricated and measured the electronic and thermal transport properties of such holey Si devices from 300 K to 650 K. Heat diffusion imaging, a hybrid approach that combines thermoreflectance imaging and the heat spreader method was used for the in-plane thermal conductivity measurement and gives a value of 6.00 ± 1.83 W/mK at room temperature. The power factor times temperature is about 0.52 ± 0.04 W/mK at 300 K and 1.10 ± 0.09 W/mK at 650 K. Therefore, ZT of the holey Si device is approximately 0.09 at room temperature and is at least 0.29 at 650 K. Further improvement is possible by optimizing the feature sizes and using surface doping.