Thermal sensitivity analysis of on‐chip interconnects

Abstract

A new method for time-domain sensitivity analysis of on-chip coupled interconnects with non-uniform substrate temperature profiles is presented. The parametric macromodelling is performed via multivariate rational approximation using magnitude vector fitting algorithms. The waveform relaxation algorithm with transverse partitioning is employed for efficient sensitivity analysis of coupled interconnects. With these techniques, the thermal sensitivity of on-chip global interconnects arising from typical substrate thermal profiles are investigated.