Thermal Rounding Kinetics and Demonstration of Steep and Flat Facets Succession in Selective Si-Based Epitaxy

Abstract

Si1-xGex(SiGe) alloys are integrated in more and more complex structures, and their applications are numerous. Initially, epitaxy process was applied for SiGe channels in 32nm technologies and beyond [1]. In the 20nm technology generation, SiGe epitaxial growths are used for raised source/drain (RSD) in Fully Depleted Silicon-On-Insulator (FD-SOI) p-Metal Oxide Semiconductors (p-MOS). However, since the scaling of the transistors’ dimensions is reaching physical, material, and technological limitations [2], new challenges in Si-based technologies have to be defined. Up to now, one of the most promising studies overcoming major device issues such as parasitic capacitance [3], is the morphology’s control of SiGe epitaxial growths. This is the reason why the morphological behavior of epitaxial SiGe is of great interest for performance improvements. In SiGe epitaxies, surface morphology depends on different parameters such as deposited thickness, Ge content... But, one of the most important parameters for the morphological change is the thermal budget brought to the film during or after epitaxial growth. The consequence of a thermal budget on an epitaxial layer is the modification of the morphology to reduce the surface energy leading to thermal rounding. Finally, the transistors’ dimensions being very small, the morphology is even more affected and sensitive to any process conditions (temperature, pressure), and extensive studies on SiGe morphology are needed. For this work, patterned 300mm Si(001) bulk wafers are used as substrates. All the layers were selectively grown in a Rapid Thermal Chemical Vapor Deposition reactor using dichlorosilane, germane, and HCl chemistry at low pressure and relatively low temperature. The purge and unloading steps were adjusted to freeze the as-deposited morphology. This way, the observed morphology is the closest as possible to the one during the deposition. The first part consists of a quantitative study of the thermal rounding’s kinetics in Si1-xGex (x=0.25) epitaxies. To do so, as-deposited SiGe layers are annealed at different thermal budgets. Then, the morphology evolution during annealing is studied as a function of temperature and time. The results of post annealed SiGe epitaxies are reported in Fig.1. It is observed that an annealing temperature increase of 25°C (from 650°C to 725°C) considerably impacts the morphology which evolves progressively passing through different steps. First, the edges begin to round and retract. In this step, the as-grown facets and their corresponding overgrowths fade away completely. Then, the thermal rounding gives rise to a formation of rounded ridges all around the pattern. Finally, the corner ridges approach towards each other until they collapse to form a single large dome. The rounding kinetics is quantified by measuring the displaced volume of matter. In the final paper, an extensive study will be given in which the effect of H2pressure on the kinetics will be presented. It will be shown that the pressure has a real influence on the rounding effect due to an increase of the hydrogen coverage slowing the Si diffusion at the surface. In many MOS applications, the SiGe epitaxy has to be capped typically with a Si (or SiGe) layer to maintain good performances. In this second part, the morphology behavior of such caps is studied. Si and SiGe layers of different thicknesses, growth rates and Ge contents were grown on a rounded SiGe layer, prepared as explained in the first part. It is shown that both Si and SiGe behave differently. The SiGe cap decreases the surface undulation amplitudes more efficiently than Si. Indeed, in large patterns, the 16 nm thick SiGe cap surface is smoother (RRMS=3.57nm) than the surface of Si cap (RRMS=7.37nm) (see Fig.2). In small patterns, a regular faceted morphology is observed for thick SiGe cap which is not the case for Si cap, showing once again that SiGe cap is more efficient (Fig.3). On the other hand, for thin Si and SiGe caps, the top surface presents domes with a succession of flat and steep facets. Those facets are <113> facets for the steep ones, and <11h> with h being 9 or even more, for flat facets (Fig.4). To summarize, firstly, the thermal rounding has been quantified and shown to be very sensitive to moderate thermal budgets (e.g.700°C). Secondly, Si and SiGe caps deposited on such a rounded surface have been compared. It has been reported that thin caps present successive terraces rather than regular faceted morphology. Keywords: SiGe, Si, Epitaxy, Rounding, Capping. [1] Weber,O Symp. VLSI Techno Dig Tech Pap, 2004, p. 42. [2] Haron,N. IEEE, 2008; pp 98–103. [3] Cheng,K. Symp. VLSI Tech., 2009, pp 212-213. Figure 1