Thermal properties of III–V on a SiC platform for photonic integrated circuits

Abstract

We investigated the thermal properties of the III–V on SiC platform where a thin III–V layer was bonded on a SiC wafer for building photonic integrated circuits. Compared with III–V on a SiO2/Si wafer, the temperature increase in the InP layer on the SiC wafer was suppressed by a factor of 9 owing to the large thermal conductivity of SiC. The degradation in photoluminescence at high-temperature annealing was also suppressed, attributable to the reduction in the thermal stress owing to the small mismatch in the thermal expansion coefficients between InP and SiC. The high heat dissipation efficiency and small thermal degradation of the III–V on a SiC platform significantly improved the issues of the thermal properties in III–V on a SiO2/Si platform, enabling high-performance and low-power III–V photonic integrated circuits.