Thermal performance of TIMs during compressive and tensile stress states

Abstract

Due to the differences in thermal expansion coefficients (CTE) of materials within a microelectronic package, a package can warp in convex and concave shapes during temperature excursions of assembly and end use conditions. In large flip chip ball grid array (FCBGA) style packages, warpage plays a major factor in the long term reliability and performance of the package. When fitted with a lid, FCBGA packages use a thermal interface material (TIM) between the die and lid surfaces. Due to package warpage and other mechanical stresses, a TIM can experience a range of compressive and tensile loads during package assembly, board mount, and end use conditions. High power applications using FCBGA style packages require accurate estimates for the resistance of the TIM layer to enable accurate prediction of junction temperatures and performance. Literature indicates that the TIM resistance is higher along the edge and corner regions of the die due in part to the larger bond line thickness (BLT) in these regions. Measurements reported in this study show that this increase cannot fully be explained by larger BLT. An alternative theory is proposed that suggests the thermal performance of a TIM in a package is also dependent on its stress state and stress history. The stress state of a TIM impacts the material's contact resistance, cohesive/adhesive bond behavior, and internal resistance between filler particles. The increase in resistance for the same BLT in compression versus tensile stress can be greater by over fifty percent. In addition, experimental testing has demonstrated that tensile stress in TIMs may contribute to voiding.