Thermal Oxidation of a Densely Packed Array of Vertical Si Nanowires

Abstract

To support the feasibility of an all-Si tandem solar cell based on quantum confined Si nanowires, we investigate the diameter reduction of nanowires by thermal oxidation. As a starting point, 6 × 6 mm2 arrays of vertical nanowires with a 90-nm pitch were made by DUV lithography and anisotropic reactive ion etching. These arrays are subsequently oxidized at temperatures ranging from 825°C to 1150°C. The lower temperature oxidation results in retarded oxidation kinetics, as expected. An unexpected gradual necking and undercutting of the nanowires is however observed for all oxidation temperatures. The effect of temperature on the stress buildup is investigated by process simulation and an eventual solution to the necking problem is found in a two-step oxidation process. This process consists of stopping the oxidation before any necking occurs and removing the oxide before further oxidizing the nanowires to obtain the desired core diameter.