Thermal layout optimization for 3D stacked multichip modules

Abstract

To satisfy the industry’s demand for high storage density in devices of the same size, the multichip stacking packaging technology has emerged. However, 3D stacked multichip modules (MCMs) can lead to higher power and heat flow density, highlighting thermal issues in the packaging structure. This paper utilizes a high-order finite element method (FEM) for efficient simulation of integrated circuits’ thermal problems. Additionally, we propose a particle swarm optimization (PSO) scheme based on dynamic strategies to overcome traditional optimization algorithm limitations, including slow convergence and difficulties in obtaining global optimal solutions. We conducted thermal design optimization on the multichip stacking structure under convection boundary conditions to achieve optimal thermal performance. The proposed multichip stacking collaborative optimization scheme has fast convergence speed, and the optimized multichip layout exhibits minimal temperature differences and balanced heat distribution.