Thermal imaging for reliability characterization of copper vias

Abstract

Microelectronic integrated circuits experience nonuniform high temperatures during normal operation. Thermal expansion mismatch among the different materials comprising the device lead to a large tensile stress after high temperature cycles. Voiding and open-circuit failure from cracking of interconnects are often observed during isothermal aging and thermal fatigue tests with or without electric current. Thermoreflectance microscopy as a high resolution, non-contact imaging technique is applied for thermal profiling and reliability analysis of 500nm diameter copper interconnects under temperature stress tests. In addition to external electrical measurements which can show the aggregate change in material's or device's electrical properties, we are able to detect local temperature rise at each via. While techniques such as scanning electron microscopy can be used to locate opened circuits; thermal imaging can detect the local change in via's resistance and in the thermal resistance of the surrounding material before the complete failure. We discuss how the thermal profile could be used to identify the location of the failure and the time-to-failure of a given via in a chain.