Abstract

High density 3-dimensional (3D) crossbar resistive random access memory (RRAM) is one of the major focus of the new age technologies. To compete with the ultra-high density NAND and NOR memories, understanding of reliability mechanisms and scaling potential of 3D RRAM crossbar array is needed. Thermal crosstalk is one of the most critical effects that should be considered in 3D crossbar array application. The Joule heat generated inside the RRAM device will determine the switching behavior itself, and for dense memory arrays, the temperature surrounding may lead to a consequent resistance degradation of neighboring devices. In this work, thermal crosstalk effect and scaling potential under thermal effect in 3D RRAM crossbar array are systematically investigated. It is revealed that the reset process is dominated by transient thermal effect in 3D RRAM array. More importantly, thermal crosstalk phenomena could deteriorate device retention performance and even lead to data storage state failure from LRS (low resistance state) to HRS (high resistance state) of the disturbed RRAM cell. In addition, the resistance state degradation will be more serious with continuously scaling down the feature size. Possible methods for alleviating thermal crosstalk effect while further advancing the scaling potential are also provided and verified by numerical simulation.

Highlights

  • On an individual device level and neglected the diode device

  • Word lines (WL) or bit lines (BL) in the top and bottom layers of 3D array system are assumed to connect with ideal heat dissipation packaging structure and keep at room temperature T0 = 300 K during the calculation, as

  • All the RRAM cells are in LRS

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Summary

Physical Model Description

Both set and reset occur at the same voltage polarity. Word lines (WL) or bit lines (BL) in the top and bottom layers of 3D array system are assumed to connect with ideal heat dissipation packaging structure and keep at room temperature T0 = 300 K during the calculation, as. Ni/HfO2/Pt RRAM device and Ti/TiO2/Pt diode based 1D1R structure and their corresponding electrical parameters in ref.

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