Thermal Crosstalk Analysis of Phase Change Memory Considering Thermoelectric Effect and Thermal Boundary Resistance

Abstract

Phase change memory (PCM) has emerged as a promising memory for next-generation applications due to its high-speed read and write capabilities as well as non-volatility. However, as PCM scales down to smaller feature sizes, it faces the challenge of thermal crosstalk. During the reset operation, a large amount of heat is generated and dissipated in the PCM array, potentially affecting adjacent memory cells, compromising device stability, and limiting high-density integration. To accurately investigate the thermal crosstalk in the PCM array, the conventional finite element model of the PCM array is improved by incorporating the thermoelectric effect and thermal boundary resistance. Under the 65, 45, 32, and 22-nm process nodes, the improved model reveals the occurrence of thermal crosstalk within the PCM array, whereas the conventional model is unable to detect this phenomenon at the 65-nm node. The improved model proposed in this paper incorporates more comprehensive considerations, providing a more precise analysis of the thermal crosstalk phenomenon in the PCM array, and thereby offering theoretical reference for high-density integration of the PCM.