Thermal contact conductance of coated junctions within microelectronic packages

Abstract

There are inevitably mechanical or metallurgical joints between the integrated circuit chips and heat sinks in microelectronic packages. This paper discusses the role of the thermal contact conductance of metal and coating ceramic substrate interfaces within microelectronic packages. Two different surface roughness contacts are evaluated using four different coatings of the ceramic substrate. A comparison of the experimental data with an existing analytical model is presented. NOMENCLATURES H' effective micro-hardness, Pa h' thermal contact conductance with a coating layer, Wlm'K k' effective thermal conductivity, WImK m asperity slope P contact pressure, Pa r surface roughness, m w Ra average surface roughness, m INTRODUCTION Within a microelectronic device, there are many contacting surface areas between the integrated circuit chip (the heat source) and the surrounding packaging (the heat sink). For the construction of a typical semiconductor assembly, important aspects include the bonding agents and the heat spreader materials for the device junctions, the packaging of the bonded joints, and the presents of any voids within these compounds. The heat dissipation characteristics of the assembly may also be of importance. Integrated circuit assemblies were first developed in order to connect highly integrated chips and other devices. As the need grows for more compact systems with increased power densities, subsequent increases in the operating temperatures present within these systems is unavoidable. Many recent studies indicate that even a ten degree increase in temperature will decrease the overall device life by as much as a factor of two (Taub and Schilling [l]). Reduction and minimization of thermal contact resistance, enhancement of thermal contact conductance within microelectronic devices, has been the focus of recent investigations [2,3]. The key to the successful thermal design of microelectronic devices lies in maintenance of all components below the maximum allowable temperature during peak operating conditions, and at lower temperatures during normal operating conditions. This may only be accomplished through the maximization of the heat rejection capabilities of the packaging components. There are several important factors limiting the thermal dissipation characteristics of a device. These include the thermal resistances present at any actual mechanical/metallurgical joints. 'c/ Copyrjahl@ 1993 by the American lnslilvte o f Aeronautics and A~lmnauties, Inc I All righra m~crvcd The increased power capacities of modern microelectronics require greater heat dissipation and more reliable thermal control. One of the most effective means of controlling thermal contact conductance within microelectronic packages is through the use of a surface coating technique 141. The use of a coating layer is believed to be more robust than interstitial materials and more suitable for repeated load. Kang et al. [5] evaluated the effect on the thermal contact conductance of turned surfaces using three different coating materials, lead, tin, and indium, and the results verified that an optimum coating thickness existed. They also indicated that the thermal contact conductance enhancement was greater at lower contact pressure. However, they did not examine the effect of surface roughness on the enhancement of the thermal contact conductance. Antonetti [6] developed a thermal-mechanical model for a nominally flat, conforming rough surface as follows: h'r/mk' = 1.25 (P/H'J (1) This model was developed for ranking combinations of layersubstrates in terms of the effective thermal conductivities and effective hadnesses of the substrate and coating material. The model compared quite well with the limited experimental results obtained for smooth silver coatings on one contacting side of a pair of bead-blasted nickel specimens. A search of the literature [7-91 showed that most investigations of thermal contact conductance of metallic coated contacts are related to the metal substrate junctions. In 1988, Peterson and Fletcher [IO] conducted an experiment to investigate the thermal contact conductance between four mold compounds and heat spreader materials. A bare junction using three different substrate materials, Invar, Kovar, and Alloy 42, and four mold compounds, MG25F-LMP, MG45F-04, Polyset 410B and Polyset 410C, were studied. However, no coated substrate samples are discussed in their experiment work. Therefore, a study of ceramic substrates coated with different materials is needed. Ceramics have been present within microelectronic packaging since the first integrated circuitry [ll]. They posses a range of mechanical, electrical, and thermal properties, unmatched within any other body of h o w materials. Due to their low coefficients of thermal expansion, and high temperature stability, metallic oxides, including aluminum oxide and aluminum nitride, have consistently been used within microelectronic devices as semiconductor substrates. Often ceramic and metallic materials with specific properties are combined, forming composite materials. These composite materials have certain desired properties of the original combined materials. As the need for more compact integrated circuitry increases, elaborate designs combining ceramic,