Thermal characterization of power transistors

Abstract

The idealized concept of thermal resistance as applied to power transistors is discussed. This concept must be used with care because two of the basic assumptions made in applying the concept to these devices are not valid. Contrary to these assumptions, it is shown that 1) the junction temperature of a power transistor is never spatially uniform, and 2) no unique value of thermal resistance can be defined for all operating conditions. Also, various electrical methods for measuring the junction temperature (thermal resistance) of power transistors are discussed with the emphasis placed on the emitter-only switching measurement technique, which is the preferred standard method of measurement. In addition, the generation and meaning of forward-biased safe-operating-area (SOA) limits are discussed, and it is shown that because of the presence of current crowding and the associated hotspots, the specified SOA limits often permit devices to be operated at dangerously high junction temperatures. Electrical measurement methods capable of determining the peak junction temperature as well as determining the onset of current crowding are described, and it is shown how these methods might be used for the generation of improved SOA limits.