Abstract

In this work, the thermal behavior of GaN HEMTs is studied with a three-fold contribution: (i) test structures for resistive thermometry are introduced and manufactured; (ii) subsequently, those are used to perform the on-wafer thermal characterization of small and power HEMTs on SOI, and poly-AlN (QST®) with the aim of comparing the thermal resistance with respect to the reference Si counterpart; (iii) finally, 3D thermal FEM models validated with the experimental results obtained in the previous step are used to perform transient thermal simulations to analyze the effects of substrate thinning, thereby providing as output the thermal impedance (also as equivalent network) and the Safe Operating Area.

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