Abstract

3D Network-on-Chip NoC based systems have severe thermal problems due to the stacking of dies and disproportionate cooling efficiency of different layers. While adaptive routing can help with thermal issues, current routing algorithms are either thermally imbalanced or suffer from traffic congestion. In this work a novel thermal aware dynamic weighted adaptive routing algorithm has been proposed that takes traffic and temperature information into account and prevents packets being routed across congested and thermally aggravated areas. Dynamic weighted model will consider parameters related to congestion and thermal issues and provide a balanced suitable approach according to the current scenario at each node. The efficiency of the proposed algorithm is analyzed and evaluated with state-of-the-art thermal-aware routing algorithms using a simulation environment. Results obtained from the simulation shows that the proposed algorithm has performed better in terms of global average delay with 17-33 percent improvement and better thermal profiling under various synthetic traffic conditions.

Highlights

  • 3D-IC (Three Dimensional Integrated Circuit) is capable of providing small interconnections resulting in reducing delays due to die stacking. 3D NoC based chip multiprocessors (CMP) are estimated to have higher performance with less data transmission connection cost and power consumption [1]

  • In this work a technique that can consider temperature, congestion and most importantly allow packets to adaptively select their neighbor by dynamically adjusting weights of the cost model is proposed

  • Thermal-Aware Dynamic Weighted Routing (TADWR) routing algorithm has been simulated in Access Noxim [22]

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Summary

Introduction

3D-IC (Three Dimensional Integrated Circuit) is capable of providing small interconnections resulting in reducing delays due to die stacking. 3D NoC based chip multiprocessors (CMP) are estimated to have higher performance with less data transmission connection cost and power consumption [1]. 3D NoC based chip multiprocessors (CMP) are estimated to have higher performance with less data transmission connection cost and power consumption [1]. Conventional NoC architectures consist of processing element (PE), network interface and router in every tile. Routers are a source of thermal hotspot due to high switching activity and congestion resulting in higher power density [2]. Power density of the router area is higher than power density in intellectual property IP [3]. It is the fact, higher power consumption of the chip elements results in deteriorating heat. Routers are responsible for providing communication between IPs at the cost of high heat dissipation

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