Abstract

In this paper, we build a numerical p-n Si/GaAs heterojunction model using quantum-mechanical tunneling theory with various quantum tunneling interfacial materials including two-dimensional (2D) materials such as hexagonal boron nitride (h-BN) and graphene, and ALD-enabled oxide materials such as HfO2, Al2O3, and SiO2. Their tunneling efficiencies and tunneling currents with different thicknesses were systematically calculated and compared. Multiphysics modeling was used with the aforementioned tunneling interfacial materials to analyze changes in the strain under different temperature conditions. Considering the transport properties and thermal-induced strain analysis, Al2O3, among three oxide materials, and graphene in 2D materials are favorable material choices that offer the highest heterojunction quality. Overall, our results offer a viable route in guiding the selection of quantum tunneling materials for a myriad of possible combinations of new heterostructures that can be obtained with an ultra-thin tunneling intermediate layer.

Highlights

  • Semiconductor heterojunctions have long been considered one of the most important building blocks of the semiconductor industry

  • Our results offer a viable route in guiding the selection of quantum tunneling materials for a myriad of possible combinations of new heterostructures that can be obtained via the UT method

  • 2a–c shows the tunneling probability of electrons at the is n-GaAs/oxide

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Summary

Introduction

Semiconductor heterojunctions have long been considered one of the most important building blocks of the semiconductor industry They have led to various practical electronic and optoelectronic applications such as lighting devices (light-emitting devices and lasers), sensors, transistors, and photovoltaics [1,2,3,4,5,6,7]. In the early days, advanced wafer bonding techniques, such as surface-activated bonding (SAB), were introduced and applied to demonstrate various Si-to-III-V solar cells and transistors [16,17] This method has several restrictions in that the source materials must exist in the form of the wafer, and the defect formation is due to different lattice parameters between to-be-bonded semiconductors

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