Abstract

In this paper, we investigated a new class of nanometer scale transistors that use the field generated by an applied gate bias to modulate the transmission probability through a tunnel barrier between drain and source. We handled two types of transistors, namely single- and dual-gate transistors and studied the various key parameters affecting the device performance. The characteristics of such transistors were studied using a computer simulation. A 2D Poisson's equation solver was implemented to calculate the potential distribution using the finite element method. Then, the current was calculated using the transmission coefficient by considering the electron energy distribution. It was found that a moderate gate bias can result in large changes in source-drain current. Also, it was found that the device dimensions influence satisfactorily the I-V characteristics, and thus affecting the transconductance and the output impedance.

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