Theoretical and Experimental Study of Complementary Metal Oxide Semiconductor Inverters under High-Power Microwave Interferences

Abstract

In this article, we report a study of the upset effects on complementary metal oxide semiconductor inverters under high-power microwave interferences. By means of SPICE simulations as well as experimental measurements, the output logic voltage waveforms of inverters were investigated through radio frequency pulse injection. A special radio frequency injection test setup was designed. The power level of the radio frequency pulses being directly injected into the inverters can be as high as 45 dBm, and their frequency ranged from 800 MHz to 4 GHz. The experimental results agreed well with the theoretical simulations, such as the variation rules of the output voltages as well as some transient rising time values. Both the theoretical and experimental results indicate that the SPICE models can be used to evaluate the effects of intensive electromagnetic interference on the digital circuits. Particularly, the variation of the susceptibility of complementary metal oxide semiconductor inverters versus the frequency follows the function f2, and a strong frequency suppression effect is also observed at radio frequencies higher than C band. Finally, the threshold level of logic failure can be significantly affected by the input logic state of the inverters.