The VLSI Design of an Error-Trellis Syndrome Decoder for Certain Convolutional Codes

Abstract

In this paper a recursive algorithm using the error-trellis decoding technique is developed to decode certain convolutional codes (CC's). An example, illustrating the VLSI architecture of such a decoder, is given for a dual-k CC. It is demonstrated that such a decoder can be realized readily on a single chip with NMOS technology.