The TransC process model and interprocess communication

Abstract

Due to the increasing number of gates and the integration of hard-wired elements within Field Programmable Gate Arrays (FPGAs), high-level language programmability and tools become more necessary. Most of the existing approaches lack programming paradigms like parallelism or inclusion of predefined components to map algorithms to FPGAs efficiently. Other tools are difficult to handle because of their syntax or the way parallelism is integrated. In this paper we introduce the TransC language and focus on its concepts for concurrency as well as interprocess communication and synchronization with streams. TransC extends the C language by only a few keywords and hence eases the programming and porting of existing C-code in comparison to other approaches. A compiler is implemented that generates efficient VHDL code with only little overhead for programs with multiple processes.