Abstract
The breakdown characteristics of ultra-thin gate oxide MOS capacitors fabricated in 65 nm CMOS technology under constant voltage stress and substrate hot-carrier injection are investigated. Compared to normal thick gate oxide, the degradation mechanism of time-dependent dielectric breakdown (TDDB) of ultra-thin gate oxide is found to be different. It is found that the gate current (Ig) of ultra-thin gate oxide MOS capacitor is more likely to be induced not only by Fowler-Nordheim (F-N) tunneling electrons, but also by electrons surmounting barrier and penetrating electrons in the condition of constant voltage stress. Moreover it is shown that the time to breakdown (tbd) under substrate hot-carrier injection is far less than that under constant voltage stress when the failure criterion is defined as a hard breakdown according to the experimental results. The TDDB mechanism of ultra-thin gate oxide will be detailed. The differences in TDDB characteristics of MOS capacitors induced by constant voltage stress and substrate hot-carrier injection will be also discussed.
Highlights
With the aggressive scaling of the feature size of MOS devices, the gate oxide has had a continuous thinning trend for the past 30 years
In order to compare the differences in time-dependent dielectric breakdown (TDDB) characteristics of ultra-thin gate oxides and thick gate oxides under constant voltage stress, we perform test cases (1) and (2). 2 nm thick oxide NMOS capacitor is stressed with VG = 3.2 V and VS = 0 V in test case (1), and 5.6 nm oxide capacitor is stressed with VG = 7.5 V and VS = 0 V in test case (2)
We have investigated the TDDB characteristics of ultra-thin gate oxide MOS capacitors under constant voltage stress and substrate hot-carrier injection
Summary
With the aggressive scaling of the feature size of MOS devices, the gate oxide has had a continuous thinning trend for the past 30 years. The thickness of SiO2 gate dielectric films reduces to 1∼2 nm in the new generation technologies and that is in close proximity to a fundamental limit of 0.7 nm on the thinnest which is ascribed to Si/SiO2 interface roughness of SiO2 gate dielectric [8]. The reliability of the SiO2 gate dielectric of advanced technology MOS devices is often not influenced by Fowler-Nordheim tunneling electrons, but rather by hotcarrier injection in the actual working environments. Substrate hot-carrier injection is thought to be a better method to evaluate the breakdown characteristics of ultra-thin gate oxides of MOS devices in the actual working environments [10]. The TDDB characteristics of ultra-thin gate oxide MOS devices fabricated in 65 nm CMOS technology under constant voltage stress and substrate hot-carrier injection will be presented. The work will provide the valuable references for the further reliability study of the advanced nano-MOS devices
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