The tapered matrix amplifier: a low-power high-gain broadband amplifier

Abstract

A new distributed amplifier topology that offers greatly reduced power consumption is presented. The tapered matrix amplifier (TMA) originates from the combination of transmission line tapering and matrix cascading of distributed amplifiers. The design of a TMA is however complicated by contrasting requirements of the tapered lines, the lumped line approximation and the parasitics of the circuit components. Therefore, a pragmatic design approach leveraging circuit optimization is proposed to handle these complexities. As a proof of concept, a prototype broadband amplifier was implemented in a 90 nm bulk CMOS process. It features an average gain of 15.8 dB over the pass-band, stretching from DC to 22 GHz, while consuming only 12.9 mW of DC power. The average noise figure in the pass-band is 5.4 dB, and the average IIP3 is −7.3 dBm. The die area occupied by the amplifier is only 0.31 mm2. In addition, it is shown that the prototype design can be easily adapted for high linearity while keeping the increase in power consumption to a minimum.