The synthesis of counter circuit layout design based on CMOS technology 0.35 μm

Abstract

This research focuses on the creation of digital system electronic design using HDL programming language, that is, VHDL and HDL Verilog. The result of HDL design is then synthesized using Leonardo Spectrum software, in which the created HDL design will be compiled with IC design technology that may be translated into the schematic and layout forms using mentor graphics and ADK ASIC Design Kit devices which are ready to be constructed or manufactured. The digital system with HDL programming language which may be translated into the schematic and layout forms will be examined using several electronic circuit designs starting with the simple circuit designs, such as Boolean algebra expressions and sequential gates, for example a control application for air temperature setting. Similarly, the complex design circuits, in which the design consists of more than the architectural circuit or have already been integrated with the processor, just like the Gumnut Processor utilization. The examination is conducted with research methodology using digital design Synthesis and implementation stages. Synthesis stages are initial stages in creating the electronic design. At this stage, the design is made using HDL programming language, input, and output design setting as well as the architectural design. Next, after the design is formed, it is simulated using simulation software, such as modelsim. When errors are not found in the simulation, the design is compiled using Leonardo Spectrum that netlist is formed. Meanwhile, the implementation stages are testing stages using ADK on mentor graphics. The synthesized design translated in the schematic and layout form is tested. The result of this research is a counter circuit using digital layout design synthesis based on CMOS technology 0.35 μm.