Abstract
A new scheme for a Side WAll Masked Isolation (SWAMI) process is presented which takes all the advantages provided by LOCOS without suffering its difficulties. The new SWAMI technology incorporates a sloped silicon sidewall and a thin nitride layer around the island sidewalls such that both intrinsic nitride stress and volume expansion-induced stress are greatly reduced. A defect-free fully recessed zero bird's-beak local oxidation process can be realized by the sloped-wall SWAMI. Fabrication technology and NMOS electrical characteristics will be discussed. Two-dimensional simulation of total reduction in effective channel width for ideal vertical isolation, LOCOS, and SWAMI will also be presented. A SWAMI/CMOS circuit including 60K ROM, 2.5K SRAM, and 100 segments of display driver with 5.13 × 5.22 mm2chip size has been successfully fabricated. The results indicate that SWAMI is capable of replacing LOCOS as the isolation technology for submicrometer VLSI circuit fabrication.
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