Abstract

Digital down converter is the core technology of soft radio receiver. It lets the high-speed-sampled digital signals down-conversion to base band down and then are decimated and high-passed filtered. This paper puts the main emphasis on analyzing the modeling and simulation by SIMULINK of digital mixing converter part and CIC decimation filter part of digital down converter and the realization on FPGA. It has been showed by the results that the problem that the operational pressure is too big to DSP and much too wide bandwidth gose against the channel separation when processing digital signal directly after A/D sampler has been solved well by digital down converter and decimating to reduce unnecessary data.

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