The SI and EMI Analysis of Sub-Femto-Farad readout circuit for capacitive sensor

Abstract

Due to the scaling down of CMOS and MEMS technology, the variation of capacitance decreases to the sub-femto-farad level. The signal charge from sensing element is weak, it is vulnerable to the dynamic coupling interference. This interference generates error charge that significantly affects accuracy of signal transmission. It is a crucial problem that how to assure the signal integrity (SI) for such a high-precision readout circuit. This paper deals with SI and EMI analysis of MEMS capacitive sensor-accelerometer/inertial sensor. And the paper demonstrates how significantly the IC-layout can contribute to the EMC performance of sub-femto-farad readout circuit for MEMS capacitive sensor. The measurement results show that the precision IC-layout reduces the equivalent input offset and improve the EMC performance of the readout circuit.