The role of hybrids in LSI systems: C. T. Goddard IEEE Trans. Components, Hybrids Mfg Technology. Chmt-2(4), 367 (December 1979)

Abstract

N THE PURSUIT of very large scale integration (VLSI), the physical nature of the single chip may assume many forms. Several of these are displayed in Fig. 1. The beam lead and appliqued beam versions usually have I/O pins on lo- and 20-mil centers. JEDEC standard chip carriers provide external connections on 40- or 50-mil centers and standard hermetic and plastic DIP’s provide leads on lOO-mil centers with 2 rows of leads spaced 300 mils or more. In all of the devices shown here, the physical extension from the chip edges is essentially a mechanical transformer which provides a simple fan-out of leads to provide a match with the grid associated with the technology of the interconnection medium. The larger packages are best suited to multilayer board (MLB) application and the unpackaged varieties are particularly compatible with the hybrid technologies. The chip carrier is intermediate, of course. The nature of simple thin and thick film multichip hybrids combining SSI silicon chips and film resistors is shown in Fig. 2. The distinction between thick and thin film is beginning to smear a little as evidenced by the thick film crossovers used in the thin film circuit. A feature of particular interest here is the reduction in package pin-outs for the hybrid compared to the number of pins which would require interconnection on MLB if each of the nine silicon chips had been separately packaged. For a system requiring the interconnection of several times the nine silicon chips (in single chip packages), either a markedly larger board would be required or board complexity measured in interconnections per square inch would increase. Both of these may have an adverse effect on system economics and both of these assume greater importance as the scale of integration in silicon is increased.