Abstract
Based on ISO/IEC 18000-6 Type B protocol, 915MHz RFID reader has been designed. FPGA is used to process the digital signal that is based on the protocol and C8051F020 is used as the controller. Each module in FPGA and verification module is designed by Verilog HDL. They are synthesized by Quartus II with EP1C6Q240C8 CMOS chip of the Altera as the target device, and they are verified on both timing and function. The result shows that it could satisfy the technology index of ISO/IEC18000-6 Type B requests and possess the advantages of flexible structure, small size and easily upgrading, etc.
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