Abstract
Traditional median filter algorithm has the long processing time, which goes against the real-time image processing. According to its shortcomings, this paper puts forward the rapid median filter algorithm, and uses DE2 board of the company called Altera to do the realization on FPGA (CycloneII 2C35). The experimental results show that the image pre-processing system is able to complete a variety of high-level image algorithms in milliseconds, and FPGA's parallel processing capability and pipeline operations can dramatically improve the speed of image processing, so the FPGA-based image processing system has broad prospects for development．
Highlights
In 1971,the famous scholar put forward the non-linearity denoising algorithm which was called median filter
The realization of traditional median filter algorithm puts the pixels of window inside in order
According to the shortcomings of the traditional median filter algorithm, this paper puts forward the rapid median filter algorithm, which makes full use of the rich FPGA hardware resources, has the advantage of parallel processing, owns smart design, and avoids a lot of comparing operations
Summary
In 1971,the famous scholar put forward the non-linearity denoising algorithm which was called median filter. For a window series of pixels on n , the first step is traversing the whole series and recording the maximum; The second step is traversing the whole series again in addition to the maximum in the previous step and recording the second maximum. It is ended until leaving the last value according to this method, and takes out the (n +1)/ 2 value, that is median output. This algorithm has the long processing time, which goes against the real-time image processing
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