Abstract
This paper proposes a Flash Analog to Digital Convsrter design based on the use of a Quantized Differential Comparator. The formulation explores the use of a systematically incorporated input offset voltage in a differential amplifier for quantizing the reference voltages necessary for Flash ADC architectures, thus eliminating the need for a passive resistor array for the purpose. This work is an attempt to extend the TIQ method, which uses systematic sizing of devices in a conventional CMOS inverter to accomplish the same. The formulation allows very small voltage comparison and complete elimination of resistor ladder circuit. The design has been carried out for the TSMC 0.18u technology at MOSIS.
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