Abstract

The interest in cast mono silicon is increasing due to its lower energy consumption and resulting smaller carbon footprint, lower oxygen content and resulting less oxygen-related defects as well as easy scalability to large wafer formats like 210 × 210 mm2 full square. As a cast silicon alternative to high performance multicrystalline (hpm) silicon, which rapidly lost market share, we analyze the cell efficiency potential of cast mono silicon in a TOPCon cell structure.We show how the absence of grain boundaries and the exceptional tolerance of the material quality towards high temperature processing enable this significant increase of the cell efficiency potential compared to hpm silicon. The very effective suppression of crystal defects by the Seed Manipulation for ARtificially controlled defect Technique (SMART) results in a very low lateral variation of the high material quality.We present certified cell efficiencies of 23.3% on n-type material crystallized in our labs, which demonstrates the high efficiency potential even for our lab-type G2 crystallization. An additional crystallization experiment for 210 × 210 mm2 wafers demonstrates that SMART mono is compatible to large wafer sizes. A significant difference of the crystallization costs for Cz and cast mono crystallization as a function of electricity costs is discussed.

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