The “pattern associative memory” and its use in logic programming language processors

Abstract

AbstractThe traditional speed improvement of the logic language processing system has been based on the parallelism of clauses, and aimed at speeding up of the unification. However, there can be another approach. By introducing a specific function to the memory hardware, the database can be managed independently of the host CPU. Then the speed is improved by minimizing the data traffic through the von Neumann bottleneck in the retrieval of candidate clauses. This paper proposes a pattern associative memory (PAM) which maintains the clauses by the structural representation in it and retrieves them by pattern matching with a high speed. To make use of argument parallelism of clauses, parallel hashing is adopted in PAM. The individual hash table employs some local search algorithms in combination with the open addressing scheme of hashing to improve the efficiency of managing records within clusters. It was verified by simulation that the compound hash algorithm is sufficiently useful for the load factor of 60 percent or less. A PAM hardware is implemented and applied in Prolog processing to demonstrate the feasibility and usefulness of the proposed method.