The Path Towards Woven Thin-film Transistors

Abstract

AbstractElectronic textiles (or e-textiles) have a wide range of potential applications in wearable computing and large-area applications, including medical monitoring, assistance to the disabled, and distributed sensor networks. We aim to integrate thin-film electronics directly into clothing during the weaving process. First, thin-film devices are fabricated on plastic substrates. Individual devices are separated by cutting the substrate into stripes which can then be woven into a textile. Devices on stripes need to survive high applied bending strains during weaving. As a first building block, we used atomic layer deposition (ALD) at a maximum temperature of 150oC to fabricate bottom-gate zinc-oxide thin-film transistors (TFTs) with a 25nm-thick Al2O3 gate dielectric, and a 15nm-thick ZnO semiconducting layer on 50μm-thick Kapton E substrates. These TFTs had average mobilities of 12cm2/Vs, threshold voltages around 1V and subthreshold slopes around 250mV/decade. However, after applying a tensile bending diameter of 1cm to the TFTs, ~80% of TFTs fail due to cracking of the brittle device layers. We studied causes of failure and investigated patterning holes in the brittle layers to prevent crack propagation though the channel. This reduced TFT failure to ~45% under the same applied bending conditions. In this paper, we will discuss failure mechanisms in our standard TFT structure when high tensile bending strains are applied and how the device structure was adjusted to decrease TFT failure.