Abstract
This paper proposes two almost all-optical packet architectures, called the switch and the switch architecture, which when combined with appropriate wait-for-reservation or tell-and-go connection and how control protocols provide lossless communication for traffic that satisfies certain smoothness properties. Both architectures preserve the order of packets that use a given input-output pair, and are consistent with virtual circuit switching, The scheduling requires 2klogT+k/sup 2/ two-state elementary switches (or 2klogT+2klogk elementary switches, if a different version is used) where k is the number of inputs and T is a parameter that measures the allowed burstiness of the traffic. The packing requires very little processing of the packet header, and uses k/sup 2/logT+klogk two-state switches. We also examine the suitability of the proposed architectures for the design of circuit switched networks. We find that the scheduling combines low hardware cost with little processing requirements at the nodes, and is an attractive architecture for both packet-switched and circuit-switched high-speed networks.
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