The P300: An Approach to Automated Inspection of Patterned Wafers

Abstract

As IC groundrules shrink, manual optical inspection of multilevel patterned wafers becomes ineffective if not impossible, and efforts to develop automatic wafer inspection systems have expanded. This paper describes one successful approach, the P300 Automatic Wafer Inspection System[1], which uses a greylevel reference comparison of adjacent cells to locate defects on periodic pattern. The defects may be either pattern anomalies or particulates. Experiments demonstrate that the P300, scanning at a rate significantly faster than a human inspector, finds over ninety percent of half micron defects and over ninety-five percent of defects one micron or larger. By basing the inspection algorithm on a cell-to-cell comparison within a frame, as opposed to the conventional chip to chip or chip to CAD database reference, the system avoids detecting false alarms caused by acceptable variations in reflectivity, film thickness, critical dimensions and overlay registration over the surface of the wafer. A simple cell-to-cell comparison, however, would he prone to detecting false alarms due to electronic and digitization noise, aliasing, vibration, and illumination non-uniformity, as well as small scale acceptable process variation. By adding a statistical test to filter out noise and an edge detector to reduce sensitivity on edges, the false positive rate has been kept below a fraction of a percent of the frames inspected. The paper will discribe the system architecture and inspection algorithms and discuss specific inspection applications.