Abstract

This paper investigates the origin of NAND cell degradation during the time interval (t wait) between program/erase (P/E) cycles. It is observed that, at room temperature, the transconductance reduction is sensitive to from erase-to-program, and longer from erase-to-program results in larger In contrast, has almost no clear dependence on from program-to-erase. Using our previous statistical method, the activation energy () of oxide damage creation is extracted. As the starting voltage () of incremental step pulse programming (ISPP) varied from 14.6 to 17.6 V, has a shift of about 11 meV and 13 meV for both from erase-to-program of 0.1 s and 4 s, respectively. We also found that linearly decreases as the maximum oxide field increases during ISPP. It would be plausible to consider a model in which the program steps generated holes inside the tunneling oxide, which recombined with inversion electrons near Si/SiO2 interface during from erase-to-program. This process generates more trap states and thus results in larger

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