The optimal EOS amplitude increment at electric strength tests of electronics

Abstract

The electric strength level of the electronics is determined by serial impact of the EOS with increasing amplitude. EOS impact repeats until functional or parametric failure is registered. For the test it is important to determine the electric strength level with acceptable accuracy. This requires the decrease of the amplitude increment coefficient. However, decreasing the value of the coefficient k is limited by the factor of dispersion of the failure threshold and by the additive effect, which manifests itself, when the subthreshold energy EOS impact. The results of researches of chips on electric strength and resistance to the additive effect are analyzed and the degree of influence of the above factors on the possible distortion in the electric strength test result is determined. Based on this analysis, the optimal value of the amplitude increment coefficient is determined of 20%. To verify the selected value of the coefficient the experiment which determines the dependence of the electric strength level on value of the coefficient was conducted. The experiment was conducted on CMOS MC ATtiny13A on the automated testing system. The experimental results indicate that it is possible to set the value of the amplitude increment coefficient equal 20% taking into account the dispersion of the electric strength level and the additive effect. On the one hand, this value of the coefficient ensures acceptable accuracy of the electric strength level at the test, on the other — excludes the influence of the additive effect. If it's necessary, the value of amplitude increment coefficient can be reduced up to 10% without substantially affecting the above factors.