Abstract
In this paper the problem of interconnecting circuit modules in microprocessor and digital system design is studied. The data transfers are expressed by m sets T i of directed edges between modules. An interconnecting schema, which is given by an assignment of the data transfers to buses, consists of the links between modules and buses. At first we show, that the problem of finding an assignment with minimum number of links is NP-complete. After that we prove that the problem of using a given interconnection schema is NP-complete, too.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.