The Influence of Superlattice Structure on the Dynamic Buffer Response of AlInN/GaN-on-Si HEMTs

Abstract

In this work, we investigate the dynamic buffer response of AlInN/GaN high electron mobility transistors (HEMTs) grown on silicon substrates. Significant improvements in vertical breakdown voltage, reduced buffer conduction and charge trapping effect are observed on the samples with a superlattice layer (SL) in the buffer. The dynamic response of the buffer layer largely depends on the composition, thickness and position of the SL in the stress-mitigating buffer. The vertical breakdown voltage increases consistently with decreasing edge-type dislocations when the density of screw-type dislocations is low. Negative back-gating measurements show the lowest buffer current hysteresis in the sample with the lowest edge-type dislocation density, indicating least charge trapping in the sample. Four terminal positive back-gating measurements in the on-state, further confirm the observed trend. Based on the experimental observations, we propose that the total density of threading dislocations, (acts as vertical leakage path) and the acceptor like edge-type dislocations should be accounted along with the electron injection from the silicon substrate to the buffer. Therefore, resulting in higher vertical breakdown voltage by alleviating serious dynamic buffer response in GaN-based HEMTs.