Abstract

Refined control of etched profile in microelectronic devices during plasma etching process is one of the most important tasks of front-end and back-end microelectronic devices manufacturing technologies. A comprehensive simulation of etching profile evolution requires knowledge of the etching rates at all the points of the profile surface during the etching process. Electrons do not contribute directly to the material removal, but they are the source, together with positive ions, of the profile charging that has many negative consequences on the final outcome of the process especially in the case of insulating material etching. The ability to simulate feature charging was added to the 3D level set profile evolution simulator described earlier. The ion and electron fluxes were computed along the feature using Monte Carlo method. The surface potential profiles and electric field for the entire feature were generated by solving Laplace equation using finite elements method. Calculations were performed in the case of simplified model of Ar+/CF4 non-equilibrium plasma etching of SiO2.

Highlights

  • The profile surface evolution itself in plasma etching, deposition and lithography development is a significant challenge for numerical methods for interface tracking itself

  • The reason is the lack of appropriate computational resources, since the Monte Carlo step requires enormous number of particles in every level set step, in order to get satisfying statistics

  • Here we present some results of the profile charging calculations for the fixed profile surface

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Summary

Introduction

The profile surface evolution itself in plasma etching, deposition and lithography development is a significant challenge for numerical methods for interface tracking itself. The difference causes the electron shading effect at the etched feature, generating positive potential at the deep trench bottom. This charging effect induces many serious plasma process induced damage problems such as bowing, trenching, reactive ion etching lag, and notching [5]. The negative charge that might develop on the sidewalls can bend the trajectories of the ions passing close to them. This bending effect may contribute to micro trenching. Etching rate reduction with time and notching of polysilicon sidewalls during the over etching step have been attributed in part to feature charging effects

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