Abstract

Static random access memory (SRAM) cells have diminishing read and write margins due to fabrication variations. These variations are a direct result of the small device sizes necessary to maintain scaling commensurate with Moore's law. Total ionizing dose (TID) primarily affects NMOS device characteristics, which are the most important to maintaining SRAM cell read stability. A test structure allowing direct measurement of SRAM cell electrical characteristics in an SRAM memory bank is presented. Experimentally measured results from this structure, fabricated on a 90 nm process, show impact of Co-60 irradiation on SRAM cell margins. This test structure is fabricated on the same die as a 1.2 Mbit SRAM, allowing comparison of the individual cell characteristics with the overall leakage impact on the large SRAM. The results indicate that by simply providing sufficient margins during SRAM cell design, functionality at high TID can be achieved without the use of radiation hardening by design (RHBD) techniques. The implications for future unhardened SRAMs operating in TID environments and on design to maintain margins are discussed.

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