Abstract
This paper describes the influence of Longitudinal Corner Effect (LCE effect) and PArallel Connection of Metal–Oxide–Semiconductor Field-Effect Transistors (MOSFETs) with Different Channel Lengths Effect (PAMDLE effect) of Diamond (hexagonal gate shape) MOSFET in different Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuits (ICs) technologies (180nm-Bulk and $1\mu \text{m}$ -Silicon-On-Insulator, SOI) and in a wide range of high-temperatures (from 300K to 573K). The results have shown (average gains of Diamond MOSFET in relation to standard MOSFET: 60% for saturation drain current, 51% for transconductance, 10% for transconductance-over-drain current ratio etc.) that LCE and PAMDLE effects tend to be similar for CMOS ICs technological nodes used and the different high temperatures. Therefore, we can conclude, for the first time, that LCE and PAMDLE effects are kept active in different CMOS ICs technological nodes and when the Diamond MOSFET is exposed at high temperatures.
Highlights
Many researches aim at enhancing the electrical performance of the Metal-Oxide-Semiconductor (MOS) Field Effect Transistor (MOSFET) using new semiconductor materials, manufacturing processes or device structures around the conventional temperature (T) range of, e.g., −25◦C to 65-85◦C [1]–[7]
The measured threshold voltages of the all devices are presented in Table 2, which were obtained through second-derivative method for VDS equal to 50mV [16] and different high temperatures
These results have shown identical reduction with the temperature in all devices, according to the dependence with the Fermi potential ( F), as expected [13], [17] and the values of VTH presented by Diamond Layout Style (DLS) for Metal–Oxide–Semiconductor Field-Effect Transistors (MOSFETs) are similar to those found in Rectangular MOSFETs style in all temperatures studied, regarding that the comparative between both devices are performed on the same Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuits (ICs) technological node
Summary
Many researches aim at enhancing the electrical performance of the Metal-Oxide-Semiconductor (MOS) Field Effect Transistor (MOSFET) using new semiconductor materials, manufacturing processes or device structures around the conventional temperature (T) range of, e.g., −25◦C to 65-85◦C [1]–[7].
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