The Impact of Isolation Methods on Device Characteristics in Bulk FinFET Using TCAD Simulation

Abstract

Due to its intrinsic structure, effective electrical isolation in bulk FinFET turns to be a critical concern for 22nm and beyond device performance. In this paper, an air-isolated fin structure for bulk FinFET was proposed and estimated. In addition, one state-of-the-art isolation approach, which contains a punch-through stopper (PTS) obtained from the lateral scattering of implanted ions in shallow trench isolation (STI) regions, is comparatively analyzed. As the fin width has been down to the sub-20 nm regime, the pros and cons of each approach are further evaluated. Our suggested air-isolation structure shows superior electrical performance and this simulated result provides a reliable alternative to support the isolation technique development of 22nm and beyond bulk FinFET.