Abstract
In this letter, 50-nm gate-length nano-silicon-on-insulator FinFETs with deep Ni salicidation and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$hboxNH_3$</tex> plasma treatment are fabricated. It is found that device performances, including subthreshold slope (SS) drain-induced barrier lowering (DIBL) and off-state leakage current, can be greatly improved by using deep Ni salicidation process compared to no Ni salicidation process. The deep Ni-salicided devices effectively suppress the floating-body effect and parasitic bipolar junction transistor action. In addition, the effect of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$hboxNH_3$</tex> plasma on the deep Ni-salicided devices is discussed. Experimental results reveal that the devices under a new state-of-the-art <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$hboxNH_3$</tex> plasma process can achieve better performance such as an SS of 66 mV/dec and a DIBL of 0.03 V.
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