The front end electronics of the NA62 Gigatracker: challenges, design and experimental measurements

Abstract

The beam spectrometer of the NA62 experiment consists of 3 Gigatracker (GTK) stations. Each station comprises a pixel detector of 16 cm 2 active area made of an assembly of 10 readout ASICs bump bonded to a 200 μ m thick pixel silicon sensor, comprising 18000 pixels of 300 μ m × 300 μ m . The main challenge of the NA62 pixel GTK station is the combination of an extremely high kaon/pion beam rate, where the intensity in the center of the beam reaches up to 1.5 Mhit s − 1 mm − 2 together with an extreme time resolution of 100 ps . To date, it is the first silicon tracking system with this time resolution. To face this challenge, the pixel analogue front end has been designed with a peaking time of 4 ns , with a planar silicon sensor operating up to 300 V over depletion. Moreover, the radiation level is severe, 2 × 10 14 1 MeV n e q . cm − 2 per year of operation. Easy replacement of the GTK stations is foreseen as a design requirement. The amount of material of a single station should also be less than 0.5% X 0 to minimize the background, which imposes strong constraints on the mechanics and the cooling system. We report upon the design and architecture of the 2 prototype demonstrator chips both designed in 130 nm CMOS technology, one with a constant fraction discriminator and the time stamp digitisation in each pixel (In-Pixel), and the other with a time-over-threshold discriminator and the processing of the time stamp located in the End of Column (EoC) region at the chip periphery. Some preliminary results are presented.