The First Optimisation of a 16 kV 4H-SiC N-Type IGCT

Abstract

A challenge in the development of Silicon carbide (SiC) gate turn-off thyristors lie in an uneven transient behaviour, necessitating expensive snubbers. To address these limitations and simplify circuit topology we present an optimized 16 kV n-type SiC integrated gate commutated thyristor (IGCT) design, which utilises a novel highly doped base strip (HDBS). A particular focus is on optimizing the gate commutation of the GCT during switching, and the trade-offs in the HDBS base design were investigated. The findings reveal that compared with conventional GCT design, the HDBS design under high current conditions recorded a 11.8% reduction in turn-off power losses. When simulating the device in a high-voltage scenario, the HDBS IGCT demonstrated a 3.9% reduction in turn-off power losses and an improved turn-on power loss performance. This resulted in a reduction of power losses by 12.1% and 2.3% in high current and high voltage conditions, respectively. In summary, the novel SiC HDBS IGCT design paves the way towards a secure, high current density, and low loss switching SiC thyristor device.