The fabrication and characterisation of metallic nanotransistors

Abstract

Enormous research studies and funding have been invested into the field of transistor miniaturisation for the last five decades. For the smallest possible MOS transistor, a channel conductance close to that of a metal has been suggested [S.V. Rotkin, K. Hess, Principles of metallic field effect transistor, in: Technical Proceedings of the 2004 NSTI Nanotechnology Conference and Trade Show, vol. 2, 2004, pp. 37–40.]. Metallic nanotransistors are promising candidates that might serve as an alternative solution for overcoming the shrinking limit of conventional MOS structures. This type of transistor operates similarly to depletion type MOSFET by governing the flow of electrons through a narrow channel made from metallic nanowire. In the fabrication of metallic nanotransistors, an electron beam lithography process has been developed to fabricate structures at the sub 30 nm scale using silver nanowires on Si 3N 4 substrate. The one-dimensional structure and the use of single material for the construction of the metallic transistors also allow the use of advanced nanoimprint technology for rapid and economic fabrication. This paper details the design, fabrication and characterisation techniques for two structures of all metal nanotransistors.