The Effects of Integration Processes on Properties of One Transistor MFMPOS Memory Devices

Abstract

Integration processing of one-transistor memory devices deals with the following issues: film quality of ferroelectric materials, integration process induced damages such as etching and forming gas annealing damage of ferroelectric materials, the alignment for devices. In order to make high quality one-transistor memory devices, integration processes including nitride gate replacement, oxide trench etching structures, selective deposition, etc. have been investigated for fabrication of one transistor MFMPOS (M: Metal, F: Ferroelectrics, M: Metal, P: polysilicon, O: oxide, S: silicon) memory devices. The integration processes for one transistor memory device have also been optimized to reduce process-induced damages. Based on the experimental results, MOCVD selective deposition can make higher quality patterned ferroelectric thin films, damascene structure with CMP processes can reduce the etching damages. Therefore, the high quality one transistor MFMPOS memory devices have been made.