The effect of silicon gate microstructure and gate oxide process on threshold voltage instabilities in BF<sub>2</sub> implanted P+ gate p-channel MOSFETs

Abstract

A study of the effects of P+ poly gate microstructure and gate oxide cycle on boron penetration from gate electrode through thin oxide is reported. The boron diffusion and the trap generation in the oxide can be significantly reduced by using an as-deposited amorphous Si gate and an oxide cycle which incorporates less Cl into the film. A strong interaction between fluorine and boron results in boron penetration into the channel and electron trap generation in the oxide. A larger grain size means fewer grain boundaries are available for boron and fluorine diffusion from the P+ gate to oxide. Less fluorine in the oxide results in less electron trap generation and less boron penetration to the Si substrate. A smaller content of Cl in the oxide results in a reduction of boron penetration. Finally, a co-implant of boron and fluorine into the as-deposited amorphous Si gate results in minimum boron diffusion into the Si substrate, which may provide the control of fluorine dose needed to reduce the interface trap density between oxide/Si interface. Increasing the grain size of the poly gate as reported above can be applied to reduce the large concentration of fluorine introduced into the gate oxide by other processes such as CVD tungsten polycide technology